This invention relates to semiconductor integrated circuit devices and more particularly to a high speed serial shift register which may be used in an access system for an MOS random access type read/write memory.
Although a variety of shift register stages are available to a designer of MOS/LSI circuits, various disadvantages inherent in these prior devices has resulted in compromises in selecting a type of stage which has characteristics suitable for a particular application. These disadvantages include high power dissipation, slow speed, complex timing, large layout area, etc. One application for serial shift registers for MOS/LSI circuits where these factors are particularly critical is in a dynamic memory having serial input/output as disclosed and claimed in copending applications Ser. Nos. 97,105 and 97,106, filed herewith and assigned to Texas Instruments.
Semiconductor memory devices of the type made by the N-channel silicon-gate MOS process and employing one transistor dynamic cells are now very widely used in computers and digital equipment. The volume of manufacture of such devices has resulted in a continuing reduction in cost according to "learning curve" theory, and this trend will continue as volume increases. In addition, improvements in line resolution and other factors have made possible increases in bit density during the last few years from 1 K through 4 K and 16 K to 64 K bits for devices now in production. This fact has further reduced the cost per bit for this type of computer memory.
Ordinarily a computer of any size, whether it is a main frame, a minicomputer, or a microcomputer, will have several different types of memory. These types may include cache, dynamic RAM, static RAM, EPROM, EAROM, ROM, buffer, magnetic bubble, CCD, several types of disc including fixed head and moving head disc, and magnetic tape. Generally the higher speed of access types are the most expensive and the lower speeds are cheapest, on a per bit basis. Other factors such as ease of programming, volatility, refresh overhead, size, power dissipation, etc., dictate choice of one type over another. One of the most common in current mainframe computers is moving head disc, which is relatively inexpensive, but the access time is slow. Fixed head disc has thus been used as a speed buffer between moving head disc and RAM, at a cost less than RAM but somewhat more than moving head disc.
Different manufacturing methods and equipment, different design efforts for product improvement, and different technology bases have caused the various types of computer memory to fail to take maximum advantage of the economics of scale. For example, one niche in the realm of memory is occupied by CCD's which are serial semiconductor devices adapted to the task of going from moving head disc to RAM, replacing fixed head disc. In spite of the fact that CCD's are basically similar to N-channel MOS RAM's, the vast design and manufacturing expertise available for the mainstream memory products shared by major semiconductor manufacturers has not been applicable to CCD's because of the differing technologies. Thus, this memory product has not kept pace in the areas of manufacturing volume, cost reduction, and bit density increases. For this reason, computer equipment manufacturers have made use of standard dynamic RAM devices to simulate operation of CCD's to accomplish the function of buffering between moving head disc and RAM. This is somewhat cheaper, but the unused speed of dynamic RAM's results in unnecessary costs. These considerations resulted in the memory device of said applications Ser. Nos. 97,105, and 97,106.
It is the principal object of this invention to provide a high speed serial shift register which is especially useful in a semiconductor memory device. Another object is to provide improved serial access type memory devices which are of lower cost and susceptible to volume production.